The three-dimensional (3-D) integrated circuit relies on the stacking of multiple two-dimensional integrated circuits into a single device using through silicon vias (TSVs) as the vertical interconnect. There are a number of factors driving 3-D integration, including reduced power consumption, resistance–capacitance delay, form factor, as well as increased bandwidth. One of the critical process steps in all 3-D processes is stacking, which may take the form of wafer-to-wafer, chip-to-wafer, or chip-to-chip bonding. This bonding may be temporary, such as can be used for attaching a device wafer to a handle wafer for thinning, or permanent, incorporating direct metal bonds or solder bumps to carry signals between the wafers and oxide bonds or underfill in the regions without conductors. In each of these processes, it is critical that the bonding is executed in such a way to prevent the occurrence of voids between the layers. This article describes the capabilities of infrared (IR) microscopy to detect micrometer size voids that can form in optically transparent blanket media such as oxide-to-oxide permanent bonding, benzocyclobuten permanent bonding, or temporary adhesive bonding laminate interfaces. The infrared microscope is described, and the measurement results from a bonded void wafer set are included. The wafers used to demonstrate the tool’s capabilities include programmed voids with various sizes, densities, and depths. The results obtained from the IR microscopy measurements give an overview of the technique’s capability to detect and measure voids as well as some of its limitations.
